Conferência:5 de Setembro 2002, 16:00-18:00
Local: Auditório da Faculdade de Tecnologia/UnB
Prof. Mauricio Ayala Rincón www.mat.unb.br/~ayala firstname.lastname@example.org
Prof. Ricardo P. Jacobi www.cic.unb.br/~rjacobi email@example.com
Publico alvo:Professores e alunos da UnB interessados em participar da
expansão do projeto de cooperação CAPES/DFG atualmente
em andamento na UnB e no ITIV da Universität Karlsruhe.
Configurable Systems-on-Chip (CSoC)
Prof. Jürgen Becker
Head of the Institut fuer Technik der Informationsverarbeitung – ITIV
Universität Karlsruhe (TH), D-76128 Karlsruhe, Germany, firstname.lastname@example.org
Abstract:Systems-on-Chip (SoC) has become reality now, driven by fast development of CMOS VLSI technologies. Complex system integration onto one single die introduce a set of various challenges and perspectives for industrial and academic institutions. Important issues to be addressed here are cost-effective technologies, efficient and application-tailored hardware/software architectures, and corresponding IP-based EDA methods. Recently, several CMOS designs and implementations of complex single SoC solutions have been realized successfully. The term SoC is still not clearly defined and used with various interpretations in different situations. A SoC consists of two or more microelectronic macro-components implementing complexities previously integrated separately into different single dies. Thus, such components, also often called IP-cores (Intellectual Property), can be distinguished by different criteria, characterizing major aspects of SoC-level integration decisions:
- integration technology,
- signal domain, e.g. digital, analog,
- design style, e.g. full-, semi-custom, pre-diffused, pre-wired (reconfigurable) + IP-based design styles,
- computing domain, e.g. processor (time domain), dedicated ASIC-based (space domain), (dynamically) reconfigurable (time / space domain),
- various memory-cores and technologies, and
- specification / programming method, e.g. high-level language HLL, Assembler, hardware languages HDL
Today´s microelectronic system designers prefer currently ASIC-based SoCs, consisting mainly of processor-, memory-, and dedicated ASIC-cores. New automatized system level and IP-based EDA methods are needed, including application-tailored hardware/software codesign and synthesis support tools based on system level specification languages like SystemC or Matlab. Recently, in addition to ASIC-based, one new promising type of SoC architecture template is recognized by several academic and first commercial versions: Configurable SoCs (CSoCs), consisting of processor-, memory-, probably ASIC-cores, and on-chip reconfigurable hardware parts for customization to a particular application. CSoCs combine the advantages of both: ASIC-based SoCs and multichip-board development using standard components, e.g. they require only minimal NRE costs, because they don´t need expensice ASIC-tools for developing always different and in the future very expensive mask sets, everytime the functionality or standards are changing. Thus, besides other advantages, an enormous cost and risk minimization perspective is obvious for industrial CSoCs.
This talk will provide an overview on recent academic and commercial developments in CSoC architectures, technologies and application perspectives in:
- wireless digital baseband design to support the required performance, flexibility and adaptivity in mobile
terminals to accommodate new services and situations easily and quickly,
- image/video-compression (e.g. MPEG-4),
- early approaches in automotive cockpit and motor control systems, among others.
Dependent on the application areas and constraints, such adaptive SoC solutions should consider time-to-market constraints, architecture flexibility (-> risk minimization), long product life cycles (multi-standard / multi-product), and multi-purpose usage (high volumes -> cost decrease per chip). Moreover, some changes for traditional chip design flows are sketched influencing today’s egineering education. Multidisciplinary system thinking is required for future designs, e.g. according to Hugo Deman, such system architects should be able to operate efficiently in interdisciplinary teams with highly soft-skilled members, required more and more by today´s embedded systems divisions.